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Eduard Cerny
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The power of assertions in SystemVerilog
Eduard Cerny · Springer
544 sayfa · 2010
Verilog (Computer hardware description language) / Integrated circuits / Data processing / Verification / Verilog (computer hardware description language)
Verification methodology manual for SystemVerilog
Janick Bergeron, Eduard Cerny, Alan Hunter, Andy Nightingale · Springer
517 sayfa · 2005
Verilog (Computer hardware description language) / Integrated circuits / Verification / Technology
Hierarchical annotated action diagrams
Eduard Cerny, Bachir Berkane, Pierre Girodias, Karim Khordoc · Kluwer Academic Publishers
222 sayfa · 1998
Computer input-output equipment / Mathematics / Charts, diagrams / Design and construction / Systems analysis & design
SVA
Eduard Cerny, Surrendra Dudani, John Havlicek, Dmitry Korchemny · Springer
600 sayfa · 2014
System design
